US 12,446,406 B2
Display device
Kwang Soo Bae, Yongin-si (KR); Min Jeong Oh, Gimpo-si (KR); Sang Hyun Choi, Seoul (KR); and Chaun Gi Choi, Suwon-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Apr. 18, 2022, as Appl. No. 17/723,298.
Claims priority of application No. 10-2021-0072662 (KR), filed on Jun. 4, 2021.
Prior Publication US 2022/0392978 A1, Dec. 8, 2022
Int. Cl. H10K 59/122 (2023.01); H10K 50/84 (2023.01); H10K 50/86 (2023.01); H10K 59/123 (2023.01); H10K 59/38 (2023.01); H10K 59/40 (2023.01); H10K 59/80 (2023.01)
CPC H10K 59/122 (2023.02) [H10K 50/84 (2023.02); H10K 50/865 (2023.02); H10K 59/123 (2023.02); H10K 59/38 (2023.02); H10K 59/40 (2023.02); H10K 59/8792 (2023.02); H10K 59/8731 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display device comprising:
a base substrate;
a thin-film transistor disposed on the base substrate;
a via layer disposed on the thin-film transistor and having a via hole formed therein, the via hole penetrating the via layer in a thickness direction;
a first electrode disposed on the via layer and having an electrode hole formed therein, the electrode hole penetrating the first electrode in the thickness direction;
a bank layer disposed on the first electrode and exposing part of a top surface of the first electrode;
an emission layer on the first electrode; and
a second electrode on the emission layer,
wherein the first electrode comprises a first portion on a first side of the electrode hole that is electrically connected to the thin-film transistor through the via hole and a second portion on a second side of the electrode hole that is entirely on an upper surface of the via layer,
wherein the first portion and the second portion are physically and electrically connected to each other, and
wherein the bank layer includes an outer bank pattern, which overlaps with the via hole in the thickness direction, and a bank island pattern, which is disposed in the electrode hole.