| CPC H10F 39/80377 (2025.01) [H10F 39/014 (2025.01); H10F 39/8033 (2025.01); H10F 39/802 (2025.01)] | 20 Claims |

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1. A method of forming a pixel sensor, comprising:
forming, in a substrate, a cell p-well (CPW) region;
forming, in the substrate, a p-type region;
forming, in the substrate and above the p-type region, a plurality of channel fins for a transfer fin field effect transistor (finFET);
forming, in the substrate and within a perimeter of the CPW region, an n-type region of a photodiode;
forming, in the substrate and within the perimeter of the CPW region, a drain extension region of the transfer finFET,
wherein the plurality of channel fins couple the n-type region and the drain extension region;
forming a transfer gate above the p-type region and at least partially around the plurality of channel fins;
etching the CPW region to form an isolation structure that surrounds the n-type region, the p-type region, the drain extension region, and the transfer gate; and
connecting the transfer gate to an interconnect.
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6. A method of forming a pixel sensor, comprising:
forming, in a substrate, a cell p-well (CPW) region;
forming, in the substrate, a p-type region;
forming, in the substrate and above the p-type region, a plurality of channel fins for a transfer fin field effect transistor (finFET);
forming, in the substrate and within a perimeter of the CPW region, an n-type region of a photodiode;
forming, in the substrate and within the perimeter of the CPW region, a drain extension region of the transfer finFET,
wherein the plurality of channel fins couple the n-type region and the drain extension region;
forming a transfer gate above the p-type region and at least partially around the plurality of channel fins,
wherein the transfer gate comprises a high-k dielectric layer over a bottom interface oxide layer; and
etching the CPW region to form an isolation structure that surrounds the n-type region, the p-type region, the drain extension region, and the transfer gate.
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8. A method of forming a pixel sensor, comprising:
forming, in a substrate, a cell p-well (CPW) region;
forming, in the substrate, a p-type region;
forming, in the substrate and above the p-type region, a plurality of channel fins for a transfer fin field effect transistor (finFET);
forming, in the substrate and within a perimeter of the CPW region, a drain region;
forming, in the substrate and within the perimeter of the CPW region, an n-type region of a photodiode;
forming, in the substrate and within the perimeter of the CPW region, a drain extension region of the transfer finFET,
wherein the plurality of channel fins couple the n-type region and the drain extension region;
forming a transfer gate above the p-type region and at least partially around the plurality of channel fins;
etching the CPW region to form an isolation structure that surrounds the n-type region, the p-type region, the drain extension region, the drain region, and the transfer gate;
connecting the drain region to a first interconnect; and
connecting the transfer gate to a second interconnect.
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