US 12,446,325 B2
Electrostatic discharge protection circuit and semiconductor circuit
Ming-Fang Lai, Hsinchu (TW); Liang-Yu Su, Yunlin County (TW); and Hang Fan, Shanghai (CN)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Mar. 27, 2024, as Appl. No. 18/617,658.
Application 18/617,658 is a continuation of application No. 17/219,483, filed on Mar. 31, 2021, granted, now 11,973,076.
Application 17/219,483 is a continuation of application No. 15/964,909, filed on Apr. 27, 2018, granted, now 10,978,445, issued on Apr. 13, 2021.
Claims priority of application No. 201810094319.3 (CN), filed on Jan. 31, 2018.
Prior Publication US 2024/0234411 A1, Jul. 11, 2024
Int. Cl. H02H 9/04 (2006.01); H03K 17/081 (2006.01); H10D 84/01 (2025.01); H10D 84/80 (2025.01); H10D 89/60 (2025.01); H10D 30/47 (2025.01); H10D 62/85 (2025.01)
CPC H10D 89/811 (2025.01) [H02H 9/046 (2013.01); H03K 17/08104 (2013.01); H10D 84/01 (2025.01); H10D 84/811 (2025.01); H10D 89/819 (2025.01); H10D 89/911 (2025.01); H02H 9/04 (2013.01); H02H 9/044 (2013.01); H10D 30/47 (2025.01); H10D 62/8503 (2025.01)] 19 Claims
OG exemplary drawing
 
1. An ESD protection circuit, coupled between a first reference terminal and a second reference terminal, the electrostatic discharge protection circuit comprising:
a first voltage divider;
a second voltage divider;
a first trigger circuit, comprising a first terminal and a second terminal, wherein the first terminal is coupled to the first reference terminal, the second terminal is coupled to the second reference terminal via the first voltage divider;
a second trigger circuit, comprising a first terminal and a second terminal, wherein the first terminal is coupled to the second reference terminal, the second terminal is coupled to the first reference terminal via the second voltage divider;
a first discharge component, comprising a gate, a first source/drain and a second source/drain, wherein the gate is coupled between the first trigger circuit and the first voltage divider; and
a second discharge component, comprising a gate, a first source/drain and a second source/drain, wherein the gate is coupled between the second trigger circuit and the second voltage divider,
wherein the first trigger circuit comprises a first GaN based transistor, comprising a first source/drain, a second source/drain and a gate, wherein the first source/drain of the first GaN based transistor is coupled to the second source/drain of the first GaN based transistor, and further coupled to the first terminal of the first trigger circuit, and the gate of the first GaN based transistor is coupled to the second terminal of the first trigger circuit,
wherein the second trigger circuit comprises a second GaN based transistor, comprising a first source/drain, a second source/drain and a gate, wherein the first source/drain of the second GaN based transistor is coupled to the second source/drain of the second GaN based transistor, and further coupled to the first terminal of the second trigger circuit, and the gate of the second GaN based transistor is coupled to the second terminal of the second trigger circuit.