US 12,446,307 B2
Structure and method of forming spacers on unfaceted raised source/drain regions
George R. Mulfinger, Wilton, NY (US); Md Nasir Uddin Bhuyian, Cohoes, NY (US); Shesh Mani Pandey, Saratoga Springs, NY (US); Adam S. Rosenfeld, Ballston Spa, NY (US); and Selina A. Mala, Ballston Spa, NY (US)
Assigned to GlobalFoundries U.S. Inc., Malta, NY (US)
Filed by GlobalFoundries U.S. Inc., Malta, NY (US)
Filed on Apr. 29, 2022, as Appl. No. 17/732,601.
Prior Publication US 2023/0352348 A1, Nov. 2, 2023
Int. Cl. H10D 86/01 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 64/01 (2025.01); H10D 86/00 (2025.01)
CPC H10D 86/01 (2025.01) [H10D 62/116 (2025.01); H10D 62/151 (2025.01); H10D 64/018 (2025.01); H10D 64/021 (2025.01); H10D 86/201 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a semiconductor layer;
a gate structure on the semiconductor layer;
sidewall spacers adjacent to opposing sidewalls of the gate structure, wherein each sidewall spacer has a first section on the semiconductor layer positioned laterally adjacent to the gate structure and further having has a second section above and wider than the first section and positioned laterally adjacent the gate structure; and
source/drain regions on the semiconductor layer and positioned laterally adjacent to the sidewall spacers, respectively, wherein each source/drain region adjacent to a sidewall spacer includes: a first portion immediately adjacent to the first section of the sidewall spacer between the semiconductor layer and the second section of the sidewall spacer; and a second portion extending vertically from the first portion along and immediately adjacent to a side surface of the second section of the sidewall spacer.