US 12,446,289 B2
MOSFET device structure with air-gaps in spacer and methods for forming the same
Gulbagh Singh, Tainan (TW); Po-Jen Wang, Taichung (TW); and Kun-Tsang Chuang, Miaoli (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Nov. 13, 2023, as Appl. No. 18/507,473.
Application 18/507,473 is a continuation of application No. 17/741,609, filed on May 11, 2022, granted, now 11,855,170.
Application 17/741,609 is a continuation of application No. 16/835,556, filed on Mar. 31, 2020, granted, now 11,367,778, issued on Jun. 21, 2022.
Prior Publication US 2024/0079471 A1, Mar. 7, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/49 (2006.01); H01L 21/28 (2025.01); H01L 21/311 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H10D 64/01 (2025.01); H10D 64/23 (2025.01); H10D 64/66 (2025.01); H10B 10/00 (2023.01); H10B 12/00 (2023.01)
CPC H10D 64/679 (2025.01) [H01L 21/28141 (2013.01); H01L 21/31116 (2013.01); H10D 64/015 (2025.01); H10D 64/021 (2025.01); H10D 64/258 (2025.01); H10B 10/00 (2023.02); H10B 12/00 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A transistor, comprising:
a gate on a substrate comprising a gate dielectric layer, a gate layer on the gate dielectric layer and a silicide layer on the gate layer; and
a sidewall spacer on a sidewall of the gate, comprising:
a first oxide layer including a first oxide layer first portion extending along the sidewall of the gate and a first oxide layer second portion extending along a surface of the substrate; and
a nitride layer on the first oxide layer and including a first air gap having an end that is substantially aligned with an end of the first oxide layer first portion, and a second air gap having an end that is substantially aligned with an end of the first oxide layer second portion, wherein the first oxide layer first portion is located between the first air gap and the silicide layer; and
an etch stop layer on the sidewall spacer, wherein the etch stop layer defines the end of the first air gap and the end of the second air gap.