| CPC H10D 64/017 (2025.01) [H10B 20/25 (2023.02); H10D 62/126 (2025.01); H10D 62/405 (2025.01)] | 20 Claims |

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1. A memory device, comprising:
a substrate;
an active region protruding from a top surface of the substrate, the active region having at least one ring structure, wherein when viewed from above, the ring structure has a first linear portion, a second linear portion, a first curved portion, and a second curved portion, the first curved portion connects first sides of the first and second linear portions, and the second curved portion connects second sides of the first and second linear portions;
a first gate structure and a second gate structure over the substrate and crossing the active region, wherein the first gate structure overlaps the first curved portion of the ring structure, and the second gate structure overlaps the first and second linear portions of the ring structure; and
a first word line and a second word line electrically connected to the first gate structure and the second gate structure, respectively.
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