| CPC H10D 64/017 (2025.01) [H10D 30/031 (2025.01); H10D 30/6713 (2025.01); H10D 30/6735 (2025.01); H10D 64/021 (2025.01); H10D 84/013 (2025.01); H10D 84/0147 (2025.01); H10D 84/0151 (2025.01); H10D 84/038 (2025.01)] | 20 Claims |

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1. A method, comprising:
forming a first semiconductor layer over a substrate;
forming a dummy material covering a first sidewall of the first semiconductor layer;
forming source/drain epitaxy structures over the substrate and in contact with the first semiconductor layer;
forming an interfacial layer on a top surface and a second sidewall of the first semiconductor layer that are uncovered by the dummy material;
removing the dummy material to expose the first sidewall of the first semiconductor layer;
forming a second semiconductor layer on the first sidewall of the first semiconductor layer after removing the dummy material, wherein the second semiconductor layer and the source/drain epitaxy structures have different conductivity types; and
forming a gate electrode over the interfacial layer.
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