US 12,446,274 B2
Semiconductor device having a termination region with deep trench isolation
Ignacio Cortes Mayol, Spain (IT)
Assigned to Monolithic Power Systems, Inc., Kirkland, WA (US)
Filed by Monolithic Power Systems, Inc., Kirkland, WA (US)
Filed on Dec. 14, 2022, as Appl. No. 18/080,938.
Prior Publication US 2024/0204043 A1, Jun. 20, 2024
Int. Cl. H10D 62/10 (2025.01); H10D 30/65 (2025.01); H10D 64/00 (2025.01)
CPC H10D 62/113 (2025.01) [H10D 30/655 (2025.01); H10D 64/111 (2025.01)] 22 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor layer of a first conductivity type;
a core active region formed in the semiconductor layer; and
a termination region comprising:
a vertical path cell of a second conductivity type, disposed laterally immediately next to the core active region, and vertically extended from a top surface of the semiconductor layer into the semiconductor layer with a vertical path cell depth, the second conductivity type being opposite to the first conductivity type;
a first type deep trench termination cell, disposed laterally immediately next to the vertical path cell, and comprising a first deep trench isolation and a first well region of the second conductivity type disposed laterally immediately next to the first deep trench isolation; and
a second type deep trench termination cell comprising a second deep trench isolation disposed laterally immediately next to the first type deep trench termination cell, and a second well region of the first conductivity type disposed laterally immediately next to the second deep trench isolation.