US 12,446,268 B2
Source and drain epitaxial layers
Wen-Hsien Tu, Hsinchu (TW); Chee-Wee Liu, Taipei (TW); and Fang-Liang Lu, New Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed on Nov. 14, 2022, as Appl. No. 18/055,036.
Application 18/055,036 is a division of application No. 16/657,372, filed on Oct. 18, 2019, granted, now 11,502,197.
Prior Publication US 2023/0074496 A1, Mar. 9, 2023
Int. Cl. H10D 30/00 (2025.01); H01L 21/02 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 30/69 (2025.01)
CPC H10D 30/797 (2025.01) [H01L 21/02675 (2013.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a fin disposed on a substrate, wherein the fin and the substrate comprise a semiconductor material;
a gate structure disposed on the fin, wherein the gate structure wraps around a portion of a sidewall surface of the fin;
a recess formed in a portion of the fin adjacent to the gate structure;
a source/drain epitaxial stack disposed in the recess, wherein a difference between a dopant concentration of the source/drain epitaxial stack and a carrier concentration of the source/drain epitaxial stack increases in a vertical direction towards the substrate; and
a contact disposed on a top layer of the source/drain epitaxial stack, wherein the contact is adjacent to the gate structure.