US 12,446,261 B2
Multi-gate devices and method of forming the same
Ming-Lung Cheng, Kaohsiung County (TW); Huang-Hsuan Lin, Hsinchu (TW); and Chih Chieh Yeh, Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Jun. 3, 2022, as Appl. No. 17/832,338.
Prior Publication US 2023/0395679 A1, Dec. 7, 2023
Int. Cl. H01L 29/423 (2006.01); H01L 29/06 (2006.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01)
CPC H10D 30/6735 (2025.01) [H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving a workpiece comprising:
a channel region extending from a substrate and comprising a plurality of channel layers interleaved by a plurality of sacrificial layers,
a source/drain region adjacent the channel region, and
a dummy gate structure over the channel region;
recessing the source/drain region to form a source/drain opening;
selectively etching the sacrificial layers to form inner spacer recesses;
forming inner spacer features in the inner spacer recesses;
forming a dielectric feature to fill a lower portion of the source/drain opening, wherein the dielectric feature substantially covers a sidewall surface of a bottommost channel layer of the plurality of channel layers;
after the forming of the dielectric feature, forming a source/drain feature on the dielectric feature to fill an upper portion of the source/drain opening;
removing the dummy gate structure;
selectively removing the plurality of sacrificial layers; and
forming a metal gate stack to wrap around each channel layer of the plurality of channel layers.