| CPC H10D 30/668 (2025.01) [H10D 30/663 (2025.01); H10D 64/252 (2025.01); H10D 84/141 (2025.01)] | 25 Claims |

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1. A method, comprising:
forming a first trench and a second trench in a semiconductor region such that a mesa region is defined between the first trench and the second trench, the mesa region having a length aligned along a longitudinal axis orthogonal to a vertical axis aligned along a height of the mesa region;
forming a dielectric layer along a sidewall of each of the first trench and the second trench;
forming an electrode in each of the first trench and the second trench;
forming a plurality of source region segments of a first conductivity type in at least a portion of a side of the mesa region; and
forming a plurality of body region segments of a second conductivity type in the at least the side of the mesa region, the plurality of body region segments defining an alternating pattern with the plurality of source region segments along the side of the mesa region, the alternating pattern being aligned along the longitudinal axis.
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