| CPC H10D 30/66 (2025.01) [H01L 23/49562 (2013.01); H10D 30/0291 (2025.01); H10D 64/111 (2025.01)] | 9 Claims |

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1. A method for manufacturing a power device, comprising:
providing an electrical substrate having a first surface and a second surface that is opposite to the first surface, and an electrode layer that is located on the second surface; wherein the electrical substrate further has an epitaxial drift layer, and the epitaxial drift layer is doped with a first electrically conductive dopant;
doping the first surface with a second electrically conductive dopant to form a plurality of doping regions; wherein any two adjacent ones of the doping regions are spaced apart by a gap, and the first electrically conductive dopant and the second electrically conductive dopant have opposite electrical charges;
forming an epitaxial compound layer on the electrical substrate, wherein the epitaxial compound layer includes an epitaxial layer;
disposing a plurality of gates on the epitaxial compound layer, wherein each of the plurality of gates is made of a first electrically conductive material;
forming a passivation layer that covers the plurality of gates and the epitaxial compound layer;
forming a first trench that extends from a surface of the passivation layer to the first surface and has a first end opening and a second end opening; wherein the first end opening is located between two of the gates that are adjacent to each other, the second end opening is located above the gap, and a width of the second end opening is greater than the gap;
filling a second electrically conductive material in the first trench to form a source contact at the first end opening, and form a Schottky barrier contact at the second end opening;
forming a second trench that extends from the surface of the passivation layer to a surface of the epitaxial layer;
filling a third electrically conductive material in the second trench to form a drain; and
disposing a field plate on the passivation layer, wherein the field plate shields the plurality of gates and the source contact, and is in electrical connection with the source contact.
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