US 12,446,247 B2
Circuit cell for a standard cell semiconductor device
Boon Teik Chan, Wilsele (BE); Bilal Chehab, Leuven (BE); and Julien Ryckaert, Schaerbeek (BE)
Assigned to Imec VZW, Leuven (BE)
Filed by IMEC VZW, Leuven (BE)
Filed on Apr. 11, 2023, as Appl. No. 18/298,820.
Claims priority of application No. 22171942 (EP), filed on May 5, 2022.
Prior Publication US 2023/0361205 A1, Nov. 9, 2023
Int. Cl. H10D 30/43 (2025.01); H01L 23/528 (2006.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/82 (2025.01)
CPC H10D 30/43 (2025.01) [H01L 23/5286 (2013.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 84/82 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A circuit cell for a standard cell semiconductor device, comprising:
a first field-effect transistor (FET) device comprising:
a source body and a drain body, each comprising a common source or drain body portion arranged along a first routing track of the circuit cell, and a set of source or drain prongs protruding from the common source or drain body portion to define an overlap with a second routing track of the circuit cell that is parallel to the first routing track,
a set of channel layers, each channel layer extending along the second routing track between a pair of the source and drain prongs, and
a gate body comprising a common gate body portion arranged along a third routing track of the circuit cell that is parallel to the second routing track, the second routing track being intermediate between the first and third routing tracks, and the gate body further comprising a set of gate prongs protruding from the common gate body portion to define an overlap with the second routing track and the channel layers; and
a second FET device comprising:
a source body and a drain body, each comprising a common source or drain body portion arranged along the third routing track, and a set of source or drain prongs protruding from the common source or drain body portion to define an overlap with the second routing track,
a set of channel layers, each channel layer extending along the second routing track between a pair of the source and drain prongs, and
a gate body comprising a common gate body portion arranged along the first routing track, and a set of gate prongs protruding from the common gate body portion to define an overlap with the second routing track and the channel layers.