| CPC H10D 12/038 (2025.01) [H01L 21/26513 (2013.01); H01L 21/28185 (2013.01); H01L 21/28211 (2013.01); H10D 12/481 (2025.01); H10D 62/112 (2025.01); H10D 62/142 (2025.01)] | 7 Claims |

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1. A method of manufacturing a semiconductor device comprising steps of:
(a) preparing a semiconductor substrate of a first conductivity type;
(b) after the step (a), forming a trench in the semiconductor substrate;
(c) after the step (b), forming a gate insulating film inside the trench and on the semiconductor substrate;
(d) after the step (c), forming a first conductive film on the gate insulating film so as to fill an inside of the trench;
(e) after the step (d), removing the first conductive film formed outside the trench, thereby forming a gate electrode made of the first conductive film inside the trench;
(f) after the step (e), removing the gate insulating film formed on the semiconductor substrate;
(g) after the step (f), forming a first insulating film on the semiconductor substrate;
(h) after the step (g), forming a first impurity region of a second conductivity type opposite to the first conductivity type in the semiconductor substrate such that a bottom portion of the first impurity region is shallower than a bottom portion of the trench;
(i) after the step (h), forming a second impurity region of the first conductivity type in the first impurity region; and
(j) after the step (i), performing a hydrogen annealing process to the semiconductor substrate,
wherein, in the step (g), the first insulating film is formed also between a side surface of the trench and the gate insulating film, and
wherein a boundary between the first impurity region and the second impurity region is located at a position deeper than the first insulating film formed between the side surface of the trench and the gate insulating film.
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