| CPC H10D 1/66 (2025.01) [H01L 21/0271 (2013.01); H01L 21/76877 (2013.01); H01L 23/5223 (2013.01); H10D 1/042 (2025.01); H10D 1/68 (2025.01); H10D 1/714 (2025.01)] | 20 Claims |

|
1. A semiconductor device, comprising:
a first conductive plate and a second conductive plate disposed adjacent to the first conductive plate;
a first insulating plate disposed over the first conductive plate and the second conductive plate;
a third conductive plate disposed over the first insulating plate;
a second insulating plate disposed over the third conductive plate;
a fourth conductive plate disposed on one side of the first conductive plate opposite to the second conductive plate;
a first conductive spacer disposed on the first insulating plate adjacent to the fourth conductive plate;
a first conductive via penetrating the second insulating plate, the first insulating plate, and the first conductive plate, wherein the first conductive via is electrically coupled to the first conductive plate; and
a second conductive via penetrating the fourth conductive plate, wherein the second conductive via is electrically coupled to the fourth conductive plate.
|