US 12,446,235 B2
Integrated circuit device with vertical cell array and through electrodes
Sangwan Nam, Busan (KR); Yongseok Kwon, Seoul (KR); and Hongsoo Jeon, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jul. 22, 2020, as Appl. No. 16/935,607.
Claims priority of application No. 10-2019-0179799 (KR), filed on Dec. 31, 2019.
Prior Publication US 2021/0202496 A1, Jul. 1, 2021
Int. Cl. H01L 27/115 (2017.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 27/11573 (2017.01); H01L 27/11582 (2017.01); H10B 69/00 (2023.01)
CPC H10B 69/00 (2023.02) [H01L 23/481 (2013.01); H01L 23/5226 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a peripheral circuit structure;
a cell array structure, including gate lines, overlapping the peripheral circuit structure and disposed on the peripheral circuit structure in a vertical direction;
a conductive plate interposed between the peripheral circuit structure and the cell array structure, the conductive plate including a through electrode region in which through holes are formed, the through holes including first through holes and second through holes;
conductive lines spaced apart from the conductive plate with the cell array structure interposed between the conductive lines and the conductive plate; and
through electrodes connected to the conductive lines and extending to the peripheral circuit structure through the cell array structure and the through holes of the conductive plate, wherein:
all the first through holes from among the through holes in the through electrode region are arranged along a first straight line extending in a first horizontal direction,
all the second through holes from among the through holes in the through electrode region are arranged along a second straight line extending in parallel with the first straight line and spaced apart from the first straight line in a second horizontal direction, perpendicular to the first horizontal direction,
each of the first through holes is staggered with respect to each of the second through holes along the first horizontal direction, and
the first through holes and the second through holes pass through only the conductive plate among the conductive plate and the cell array structure in the vertical direction.
 
11. An integrated circuit device comprising:
a peripheral circuit structure;
a cell array structure, including gate lines, overlapping the peripheral circuit structure and disposed on the peripheral circuit structure in a vertical direction;
a conductive plate interposed between the peripheral circuit structure and the cell array structure and including through holes;
conductive lines spaced apart from the conductive plate with the cell array structure interposed between the conductive lines and the conductive plate; and
through electrodes connected to the conductive lines and extending to the peripheral circuit structure through the cell array structure and the through holes, wherein
the through holes include first through holes arranged along a first straight line extending in a first horizontal direction and second through holes arranged along a second straight line extending in parallel with the first straight line and spaced apart from the first straight line by the conductive plate in a second horizontal direction, and
the first through holes and the second through holes pass through only the conductive plate among the conductive plate and the cell array structure in the vertical direction.