US 12,446,228 B2
Memory device and method for fabricating the same
Kuo-Pin Chang, Zhubei (TW); and Chien Hung Liu, Hsinchu County (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Apr. 20, 2022, as Appl. No. 17/725,013.
Claims priority of provisional application 63/294,536, filed on Dec. 29, 2021.
Prior Publication US 2023/0209836 A1, Jun. 29, 2023
Int. Cl. H10B 51/00 (2023.01); H10B 51/20 (2023.01); H10B 51/30 (2023.01)
CPC H10B 51/30 (2023.02) [H10B 51/20 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a stack comprising alternating insulating layers and sacrificial layers over a semiconductor substrate;
etching first holes in the stack;
etching through the first holes to remove first portions of the sacrificial layer, creating first voids;
depositing a first conductive material within the first voids;
forming a tunnel dielectric;
forming a semiconductor layer in the first holes;
filling the first holes with a second dielectric;
forming a mask over the stack, wherein the mask has first openings and second openings;
etching through the mask to form trenches corresponding to the first openings and second holes corresponding to the second openings;
etching though the trenches and the second holes to remove a remaining portion of the sacrificial layers and create second voids, wherein the second voids extend laterally from the trenches;
forming a data storage layer within the second voids; and
depositing a second conductive material within the second voids.