US 12,446,225 B2
Semiconductor memory device
Ki Won Kim, Seongnam-si (KR); Sung Hoon Kim, Seongnam-si (KR); and Ah Reum Kim, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Mar. 16, 2022, as Appl. No. 17/696,551.
Claims priority of application No. 10-2021-0120097 (KR), filed on Sep. 9, 2021.
Prior Publication US 2023/0074317 A1, Mar. 9, 2023
Int. Cl. H10B 43/40 (2023.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H10B 41/41 (2023.01)
CPC H10B 43/40 (2023.02) [H01L 23/5226 (2013.01); H01L 24/08 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H10B 41/41 (2023.02); H01L 2224/08145 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
a memory cell array on a substrate, the memory cell array including a memory cell configured to store data;
a peripheral circuit element on an upper surface of the substrate, the peripheral circuit element configured to control an operation of the memory cell array; and
a wiring structure on the peripheral circuit element, the wiring structure including a first wiring structure and a second wiring structure, the first wiring structure and the second wiring structure spaced apart from each other with an insulating layer interposed therebetween, the first wiring structure configured to receive a first voltage at one end thereof, the first wiring structure configured to receive a second voltage different from the first voltage at the other end thereof due to resistance of the first wiring structure, the second wiring structure configured to receive a third voltage different from the first and second voltages,
wherein the first wiring structure includes (1_1)th and (1_2)th lines extended in a first direction and spaced apart from each other in a second direction crossing the first direction,
the second wiring structure includes (2_1)th and (2_2)th lines extended in the first direction and spaced apart from each other in the second direction, and
the (1_1)th line is between the (2_1)th line and the (2_2)th line.