US 12,446,219 B2
Small-area common-voltage multi-write non-volatile memory array
Yu-Ting Huang, Hsin-Chu County (TW); and Chi-Pei Wu, Hsin-Chu County (TW)
Assigned to Yield Microelectronics Corp., Hsin-chu County (TW)
Filed by YIELD MICROELECTRONICS CORP., Hsin-Chu County (TW)
Filed on Oct. 4, 2023, as Appl. No. 18/480,722.
Claims priority of application No. 112125174 (TW), filed on Jul. 6, 2023.
Prior Publication US 2025/0017005 A1, Jan. 9, 2025
Int. Cl. G11C 5/06 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/20 (2006.01); G11C 16/26 (2006.01); H10B 41/35 (2023.01); H10B 41/70 (2023.01)
CPC H10B 41/70 (2023.02) [G11C 16/0441 (2013.01); G11C 16/10 (2013.01); G11C 16/20 (2013.01); G11C 16/26 (2013.01); H10B 41/35 (2023.02)] 22 Claims
OG exemplary drawing
 
1. A small-area common-voltage multi-write non-volatile memory array comprising:
a plurality of word lines, arranged in parallel, comprising a first word line and a second word line;
a plurality of select lines arranged in parallel, wherein the plurality of select lines perpendicular to the plurality of word lines comprise a first select line;
a plurality of common-voltage lines arranged in parallel, wherein the plurality of common-voltage lines perpendicular to the plurality of select lines are directly coupled together, the plurality of common-voltage lines comprise a first common-voltage line and a second common-voltage line, and the first word line and the second word line are respectively close to the first common-voltage line and the second common-voltage line, wherein the first word line and the second word line are arranged between the first common-voltage line and the second common-voltage line; and
a plurality of sub-memory arrays each coupled to two of the plurality of word lines, one of the plurality of select lines, and two of the plurality of common-voltage lines, wherein each of the plurality of sub-memory arrays comprises:
a first non-volatile memory cell coupled to the first word line, the first select line, and the first common-voltage line; and
a second non-volatile memory cell coupled to the second word line, the first select line, and the second common-voltage line.