US 12,446,215 B2
One-time programmable bitcell with a thermally enhanced rupture
Andrew Edward Horch, Seattle, WA (US); Larry Y. Wang, San Jose, CA (US); and WenKai Hung, Zhubei (TW)
Assigned to SYNOPSYS, INC., Sunnyvale, CA (US)
Filed by Synopsys, Inc., Sunnyvale, CA (US)
Filed on Jan. 16, 2024, as Appl. No. 18/413,739.
Prior Publication US 2025/0234529 A1, Jul. 17, 2025
Int. Cl. G11C 17/16 (2006.01); G11C 17/18 (2006.01); H10B 20/25 (2023.01)
CPC H10B 20/25 (2023.02) [G11C 17/16 (2013.01); G11C 17/18 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
passing a current through a channel of an anti-fuse field-effect transistor (FET) to increase a temperature of a gate dielectric of the anti-fuse FET and change a rupture voltage of the gate dielectric of the anti-fuse FET from a first rupture voltage to a second rupture voltage; and
rupturing the gate dielectric by applying a first voltage between the gate dielectric and the channel of the anti-fuse FET, wherein the first voltage is between the first rupture voltage and the second rupture voltage.