| CPC H10B 12/34 (2023.02) [H10B 12/053 (2023.02)] | 7 Claims |

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1. A memory device, comprising:
a semiconductor substrate including a word line extending into the semiconductor substrate,
wherein the semiconductor substrate is defined with a source region, a drain region and an ultra-lightly doped region under the drain region, the word line is disposed between the source region and the drain region, and the ultra-lightly doped region is disposed at a sidewall of the word line;
wherein the semiconductor substrate is further defined with a heavily doped region under the drain region and a lightly doped region above the ultra-lightly doped region.
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