US 12,446,206 B2
Three-dimensional semiconductor structure and formation method thereof
Yi Jiang, Hefei (CN); Deyuan Xiao, Hefei (CN); Youming Liu, Hefei (CN); Xingsong Su, Hefei (CN); Weiping Bai, Hefei (CN); and Guangsu Shao, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Aug. 1, 2022, as Appl. No. 17/878,053.
Claims priority of application No. 202210667646.X (CN), filed on Jun. 14, 2022.
Prior Publication US 2023/0403840 A1, Dec. 14, 2023
Int. Cl. H01L 23/528 (2006.01); H10B 12/00 (2023.01)
CPC H10B 12/0335 (2023.02) [H10B 12/312 (2023.02)] 14 Claims
OG exemplary drawing
 
1. A three-dimensional semiconductor structure, comprising:
a substrate; and
a device structure positioned on a top surface of the substrate;
wherein the device structure comprises memory rows arranged at intervals along a first direction, each of the memory rows comprises memory cells arranged at intervals along a second direction and a gap between adjacent two of the memory cells, each of the memory cells comprises a first stacked layer and a word line structure, the word line structure comprises a first part positioned in the first stacked layer and a second part extending out of the first stacked layer along the first direction, at least adjacent two of the memory rows exist, the second part of the memory cell in one of the memory rows extends into the gap in another one of the memory rows, both the first direction and the second direction are directions parallel to the top surface of the substrate, and the first direction intersects with the second direction;
wherein the first stacked layer comprises first semiconductor layers arranged at intervals along a third direction, each of the first semiconductor layers comprises first semiconductor pillars arranged at intervals along the first direction, and the third direction is a direction perpendicular to the top surface of the substrate; and
the word line structure comprises word lines arranged at intervals along the third direction, the word lines extend along the first direction, each of the word lines comprises a first sub part continuously wrapping the first semiconductor pillars arranged at intervals along the first direction and a second sub part extending out of the first semiconductor layer along the first direction and electrically connected to the first sub part, in any adjacent two of the word lines along the third direction, the second sub part of one of the two word lines closer to the substrate protrudes from the second sub part of other one of the two word lines along the first direction.