| CPC H04W 24/08 (2013.01) [H04L 5/0051 (2013.01)] | 10 Claims |

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1. An apparatus comprising at least one processor, and at least one memory including computer program code, wherein the at least one memory and the computer program code are configured, with the at least one processor, to cause the apparatus to:
detect a beam failure on at least one beam failure detection reference signal, BFD-RS, set of a plurality of BFD-RS sets, the apparatus being configured to communicate with an access point supporting the plurality of BFD-RS sets;
include one or more beam failure indication data into a first medium access control, MAC, control element, CE, wherein the one or more beam failure indication data indicates the beam failure detected on the at least one BFD-RS set;
wherein the one or more beam failure indication data comprises at least a first bit,
wherein the first bit has a first value when the one or more beam failure indication data includes candidate beam information encoded for a first BFD-RS set and candidate beam information encoded for a second BFD-RS set of the plurality of BFD-RS sets, wherein the first value further indicates that the beam failure is detected at least on the first BFD-RS set, and
wherein the first bit has a second value when the one or more beam failure indication data includes candidate beam information encoded for only the second BFD-RS set of the plurality of BFD-RS sets, wherein the second value further indicates that the beam failure is detected on the second BFD-RS set; and
transmit, to the access point, the first MAC CE comprising the one or more beam failure indication data.
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