| CPC H04N 25/616 (2023.01) [H04N 25/65 (2023.01); H04N 25/771 (2023.01); H04N 25/78 (2023.01)] | 7 Claims |
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1. An image sensor including a plurality of pixels, wherein
each of the pixels includes:
a photodiode configured to generate an output voltage corresponding to a light incident amount;
a reset transistor configured to reset the photodiode by supplying a reset voltage to the photodiode;
a peak hold transistor that includes a control end connected to the photodiode and the reset transistor, and is configured to allow a current corresponding to the output voltage of the photodiode or the reset voltage to flow through the peak hold transistor; and
a first capacitor and a second capacitor each configured to hold the current supplied from the peak hold transistor,
each of the pixels includes, as operation modes:
a first mode in which the output voltage of the photodiode immediately after the reset transistor is turned on to reset the photodiode is held in the first capacitor, and the output voltage of the photodiode after the photodiode is reset and a predetermined signal integration period ends is held in the second capacitor; and
a second mode in which the output voltage of the photodiode in a state where the reset transistor is turned on to reset the photodiode is held in the first capacitor or the second capacitor,
in the first mode, an image signal corresponding to the light incident amount of the photodiode and a noise signal when the light incident amount is relatively low are obtained, and
in the second mode, a noise signal when the light incident amount of the photodiode is relatively high is obtained.
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