US 12,445,649 B2
Information processing device and method
Takuya Kitamura, Kanagawa (JP); and Takefumi Nagumo, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 18/715,891
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Nov. 25, 2022, PCT No. PCT/JP2022/043458
§ 371(c)(1), (2) Date Jun. 3, 2024,
PCT Pub. No. WO2023/106120, PCT Pub. Date Jun. 15, 2023.
Claims priority of application No. 2021-200177 (JP), filed on Dec. 9, 2021.
Prior Publication US 2025/0039456 A1, Jan. 30, 2025
Int. Cl. H04N 7/12 (2006.01); H04N 19/12 (2014.01); H04N 19/184 (2014.01); H04N 19/64 (2014.01)
CPC H04N 19/647 (2014.11) [H04N 19/12 (2014.11); H04N 19/184 (2014.11)] 11 Claims
OG exemplary drawing
 
1. An information processing device comprising:
a valid most significant bit position detection unit that detects a valid most significant bit position in a data unit constituted by a plurality of samples, the valid most significant bit position being a position of a most significant bit among bits having a value different from a bit pattern according to a binary type;
a valid data extraction unit that extracts a bit string below the valid most significant bit position as valid data from the samples; and
a bitstream generation unit that generates a bitstream including information indicating the binary type, information indicating the valid most significant bit position, and the valid data of each of the samples.