US 12,445,365 B2
Technologies for performance monitoring and management with empty polling
Peter McCarthy, Ennis (IE); Chris MacNamara, Limerick (IE); John Browne, Limerick (IE); Liang J. Ma, Shannon (IE); and Liam Day, Limerick (IE)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 22, 2022, as Appl. No. 17/846,947.
Application 17/846,947 is a continuation of application No. 16/381,237, filed on Apr. 11, 2019, granted, now 11,388,074.
Claims priority of provisional application 62/656,628, filed on Apr. 12, 2018.
Prior Publication US 2022/0393960 A1, Dec. 8, 2022
Int. Cl. G06F 1/32 (2019.01); G06F 1/3209 (2019.01); H04L 41/0833 (2022.01); H04L 43/022 (2022.01); H04L 43/10 (2022.01); H04L 43/16 (2022.01)
CPC H04L 43/10 (2013.01) [G06F 1/3209 (2013.01); H04L 41/0833 (2013.01); H04L 43/022 (2013.01); H04L 43/16 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus comprising:
interface circuitry;
machine readable instructions; and
at least one processor circuit to be programmed by the machine readable instructions to:
poll an empty input queue to determine a first empty polling count of the empty input queue during a first time period;
operating on a separate input queue containing a first quantity of data during the first time period, the first empty polling count associated with a first load threshold of the at least one processor circuit;
poll the empty input queue to determine a second empty polling count of the empty input queue during a second time period;
operating on the separate input queue containing a second quantity of data during the second time period, the second empty polling count associated with a second load threshold of the at least one processor circuit, and the second quantity of data greater than the first quantity of data;
poll the empty input queue to determine a plurality of runtime empty polling counts of the empty input queue during a third time period while operating on the separate input queue with an unknown quantity of data;
determine an empty polling count trend based on the first load threshold, the second load threshold, and the plurality of runtime empty polling counts; and
cause a power state increase of the at least one processor circuit based on the trend moving toward the second load threshold; or
cause a power state decrease of the at least one processor circuit based on the trend moving toward the first load threshold.