US 12,445,161 B2
Inquirer-side circuit capable of operating in asymmetry data mode
Yuan-Jih Chu, Hsinchu (TW); Yao-Chun Chuang, Hsinchu (TW); Ching-Yen Lee, Hsinchu (TW); and Ming Hsuan Tsai, Hsinchu (TW)
Assigned to Realtek Semiconductor Corp., Hsinchu (TW)
Filed by Realtek Semiconductor Corp., Hsinchu (TW)
Filed on Dec. 4, 2023, as Appl. No. 18/528,163.
Claims priority of provisional application 63/430,666, filed on Dec. 7, 2022.
Claims priority of application No. 112143732 (TW), filed on Nov. 13, 2023.
Prior Publication US 2024/0195450 A1, Jun. 13, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H04B 1/40 (2015.01); H04B 3/23 (2006.01)
CPC H04B 1/40 (2013.01) [H04B 3/23 (2013.01)] 9 Claims
OG exemplary drawing
 
1. An inquirer-side circuit, comprising:
a hybrid circuit coupled with a medium dependent interface (MDI) circuit and configured to conduct data communication with a respondent-side circuit through the MDI circuit;
a transmitting circuit coupled with the hybrid circuit and configured to generate and transmit a transmission signal to the hybrid circuit;
a receiving circuit coupled with the hybrid circuit and configured to receive and parse a received signal transmitted from the hybrid circuit to generate a data signal;
a processing circuit coupled with the receiving circuit and configured to process the data signal;
a physical coding sublayer circuit coupled with the processing circuit and configured to conduct a physical coding operation based on instructions of the processing circuit to control operations of the transmitting circuit; and
an echo cancellation circuit coupled between the transmitting circuit and the receiving circuit and configured to generate an echo cancellation signal to the receiving circuit based on the transmission signal;
wherein if the receiving circuit receives a predetermined response signal transmitted from the respondent-side circuit during a period at which the inquirer-side circuit and the respondent-side circuit conduct a link synchronization operation or an auto-negotiation operation, the processing circuit determines that the respondent-side circuit is supporting an asymmetry data mode.