US 12,445,146 B2
Offset compensated analog-to-digital converter
Sundaraiah Gurindagunta, Gollapudi (IN); and Parthasarathy V. Sampath, Bangalore (IN)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed on Nov. 22, 2023, as Appl. No. 18/517,124.
Prior Publication US 2025/0167798 A1, May 22, 2025
Int. Cl. H03M 3/00 (2006.01); H03M 1/12 (2006.01)
CPC H03M 3/43 (2013.01) [H03M 1/1245 (2013.01); H03M 3/428 (2013.01); H03M 3/456 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for compensating for an offset voltage in a sigma-delta ADC, the method comprising:
replacing an input voltage for a first conversion of a set of conversions, at an input of the sigma-delta ADC, with a reference voltage;
quantizing the reference voltage, at a quantizer of the sigma-delta ADC, to obtain a dummy sample, the dummy sample including the offset voltage added by the quantizer of the sigma-delta ADC;
decoupling a decimation filter of the sigma-delta ADC;
generating a feedback voltage, corresponding to the dummy sample, the feedback voltage including the offset voltage;
inverting the feedback voltage to generate an inverted feedback voltage;
applying the inverted feedback voltage to an integrator of the sigma-delta ADC, the inverted feedback voltage including an inverted offset voltage; and
storing the inverted offset voltage in the integrator to generate an offset-charged integrator.