| CPC H03M 1/466 (2013.01) [H03M 1/462 (2013.01)] | 20 Claims |

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1. An analog-to-digital converter comprising:
an integrator including a variable input resistor and an integration capacitor;
a switched-capacitor bias current generator configured to be clocked by a pair of complementary clock signals to generate a bias current that is proportional to a capacitance of the integration capacitor divided by a pulse width of the complementary clock signals;
a current digital-to-analog converter (IDAC) configured to convert a digital output signal from the analog-to-digital converter into an IDAC output current for the integrator that is proportional to the bias current; and
a tuning circuit including a variable tuning resistor configured to conduct a mirrored version of the bias current to develop a tuning voltage across the variable tuning resistor, the tuning circuit further including a successive-approximation-register logic circuit configured to vary a resistance of the variable tuning resistor responsive to a tuning code, wherein the integrator is configured to vary a resistance of the variable input resistor responsive to the tuning code.
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