US 12,445,134 B1
Diode connected non-linear input capacitors based majority gate
Amrita Mathuriya, Portland, OR (US); Rafael Rios, Austin, TX (US); Dmitri E. Nikonov, Beaverton, OR (US); Biswajeet Guha, Hillsboro, OR (US); Ikenna Odinaka, Durham, NC (US); Rajeev Kumar Dokania, Beaverton, OR (US); and Sasikanth Manipatruni, Portland, OR (US)
Assigned to Kepler Computing Inc., San Francisco, CA (US)
Filed by Kepler Computing Inc., San Francisco, CA (US)
Filed on Dec. 20, 2023, as Appl. No. 18/391,438.
Int. Cl. H03K 19/23 (2006.01); H03K 19/185 (2006.01)
CPC H03K 19/23 (2013.01) [H03K 19/185 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a first capacitor to receive a first input, the first capacitor coupled to a node;
a first diode structure coupled to the first input and the node;
a second capacitor to receive a second input, the second capacitor coupled to the node; and
a second diode structure coupled to the second input and the node.