| CPC H03K 19/20 (2013.01) [H03K 19/1774 (2013.01); H03K 19/17788 (2013.01)] | 15 Claims |

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1. A control circuit comprising:
a quadrature encoder circuit generating a first edge signal and a first direction signal according to a first external signal and a second external signal;
a counter circuit performing a counting operation according to the first edge signal and the first direction signal; and
a first cutoff circuit,
wherein in response to a timer signal being enabled, the first cutoff circuit prevents the first edge signal and the first direction signal from entering the counter circuit and the counter circuit performs the counting operation according to a system clock.
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