US 12,445,126 B2
Semiconductor integrated circuit
Kayo Mori, Kanagawa (JP); Kouichi Tashiro, Kanagawa (JP); and Akihiro Fukushima, Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Feb. 2, 2023, as Appl. No. 18/163,839.
Claims priority of application No. 2022-097685 (JP), filed on Jun. 17, 2022.
Prior Publication US 2023/0412170 A1, Dec. 21, 2023
Int. Cl. H03K 17/567 (2006.01)
CPC H03K 17/567 (2013.01) 17 Claims
OG exemplary drawing
 
1. A semiconductor integrated circuit comprising:
a switch circuit that includes a plurality of first switch circuits each allowing a first current to flow and a plurality of second switch circuits each allowing a second current larger than the first current to flow, wherein each of the plurality of first switch circuits and the plurality of second switch circuits is configured to switch between an on state of supplying voltage to a respective one of a plurality of circuits connected thereto and an off state of cutting off the voltage supplied to the respective one of the plurality of circuits connected thereto; and
a control circuit configured to switch to the on state the first switch circuits and then the second switch circuits, wherein two or more of the first switch circuits or two or more of the second switch circuits are simultaneously switched to the on state according to a parameter, wherein
the control circuit includes a register that stores the parameter, a first circuit that calculates a counter value based on the parameter, and a second circuit that decodes the counter value, and
the control circuit switches the first switch circuits or the second switch circuits to the on state based on the decoded counter value.