US 12,445,095 B2
Amplification circuit
Koudai Sugiyama, Kyoto (JP)
Assigned to MURATA MANUFACTURING CO., LTD., Kyoto (JP)
Filed by Murata Manufacturing Co., Ltd., Kyoto (JP)
Filed on Jun. 1, 2022, as Appl. No. 17/804,914.
Application 17/804,914 is a continuation of application No. PCT/JP2020/040983, filed on Oct. 30, 2020.
Claims priority of application No. 2019-222772 (JP), filed on Dec. 10, 2019.
Prior Publication US 2022/0294398 A1, Sep. 15, 2022
Int. Cl. H03F 3/04 (2006.01); H03F 1/22 (2006.01); H03F 3/193 (2006.01); H03G 3/30 (2006.01); H03F 1/02 (2006.01); H03F 3/191 (2006.01)
CPC H03F 3/193 (2013.01) [H03G 3/3036 (2013.01); H03F 1/0277 (2013.01); H03F 1/223 (2013.01); H03F 3/191 (2013.01); H03F 2200/451 (2013.01); H03G 2201/103 (2013.01); H03G 2201/307 (2013.01)] 14 Claims
OG exemplary drawing
 
1. An amplification circuit comprising:
a first amplifier connected between an input terminal to which a radio-frequency signal is input and an output terminal from which a radio-frequency signal is output; and
a second amplifier connected in parallel with the first amplifier between the input terminal and the output terminal,
wherein the first amplifier comprises a first transistor and a second transistor that are cascode connected with each other,
wherein the second amplifier comprises a third transistor,
wherein the first transistor has a first terminal that is a gate or base connected to the input terminal, a second terminal that is a source or emitter connected to ground, and a third terminal that is a drain or collector,
wherein the second transistor has a fourth terminal that is a gate or base, a fifth terminal that is a source or emitter connected to the third terminal, and a sixth terminal that is a drain or collector connected to the output terminal,
wherein the third transistor has a seventh terminal that is a gate or base connected to the input terminal, an eighth terminal that is a source or emitter connected to ground, and a ninth terminal that is a drain or collector connected to the output terminal,
wherein the amplification circuit is configured to selectively switch between amplification of a radio-frequency signal input to the input terminal using the first amplifier and amplification of the radio-frequency signal input to the input terminal using the second amplifier,
wherein a bias supplied to the first terminal and a bias supplied to the seventh terminal are different from each other, and
wherein a bias supplied to the fourth terminal and a bias supplied to the seventh terminal are different from each other.