| CPC H02J 3/38 (2013.01) [H02J 3/001 (2020.01); H02J 3/007 (2020.01); G06F 1/3203 (2013.01); H02J 2300/24 (2020.01)] | 12 Claims |

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9. A control apparatus of a shutdown device, comprising:
a memory, configure to store computer program;
a processor, configured to implement a method for controlling a shutoff device when executes the computer program;
wherein the method is applied to a processor of the shutdown device;
wherein the shutoff device comprises N main switching transistors corresponding to N photovoltaic modules one by one and a release circuit;
wherein a first terminal of a first main switching transistor is an output positive terminal of the shutdown device, a second terminal of an i-th main switching transistor is connected to an output positive terminal of an i-th photovoltaic module, a first terminal of an (i+1)-th main switching transistor is connected to an output negative terminal of the i-th photovoltaic module, an output negative terminal of a N-th photovoltaic module is an output negative terminal of the shutdown device, a control terminal of the release circuit is connected to a first output terminal of the processor, an input terminal of the release circuit is connected to a bus, and an output terminal of the release circuit is grounded, wherein N≥i≥1, and N and i are both integers;
wherein the method comprises:
determining whether a heartbeat signal is received continuously during a first preset period;
when determining that the heartbeat signal is received continuously during the first preset period, controlling the N main switching transistors to be turned on, and determining whether the heartbeat signal is not received continuously during a second preset period; and
when determining that the heart signal is not received continuously during the second preset period, controlling the N main switching transistors to be turned off, and controlling the release circuit to be turned on to release a voltage on the bus.
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