US 12,444,934 B2
Electrostatic discharge (ESD) protection circuit and method of operating the same
Tao Yi Hung, Hsinchu (TW); Ming-Fang Lai, Hsinchu (TW); Li-Wei Chu, Hsinchu (TW); Wun-Jie Lin, Hsinchu (TW); and Jam-Wem Lee, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Dec. 1, 2020, as Appl. No. 17/108,497.
Claims priority of provisional application 63/003,024, filed on Mar. 31, 2020.
Prior Publication US 2021/0305809 A1, Sep. 30, 2021
Int. Cl. H02H 9/04 (2006.01); H02H 1/00 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 89/60 (2025.01)
CPC H02H 9/046 (2013.01) [H10D 84/0149 (2025.01); H10D 84/038 (2025.01); H10D 89/611 (2025.01); H10D 89/817 (2025.01); H10D 89/911 (2025.01); H10D 89/921 (2025.01); H02H 1/0007 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A clamp circuit comprising:
an electrostatic discharge (ESD) detection circuit coupled between a first node and a second node;
a first transistor of a first type, the first transistor comprising a first well, a first gate coupled to at least the ESD detection circuit by a third node, a first drain coupled to the first node and a first source coupled to the second node, at least the first transistor is in a semiconductor wafer, the semiconductor wafer including a front-side and a back-side opposite from the front-side, the first transistor being in the front-side of the semiconductor wafer;
a charging circuit coupled between the second node and the third node, and configured to charge the third node during an ESD event at the second node; and
a first conductive structure on the back-side of the semiconductor wafer, the first conductive structure being coupled to the second node, extending completely through the back-side of the semiconductor wafer, extending into the first well and is directly coupled to the first source of the first transistor.