US 12,444,706 B2
Package bonding structures and method of formation
Kai Jun Zhan, Taoyuan (TW); Chin-Fu Kao, Taipei (TW); Kuang-Chun Lee, New Taipei (TW); Ming-Da Cheng, Taoyuan (TW); and Chen-Shien Chen, Zhubei (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 8, 2024, as Appl. No. 18/629,670.
Application 18/629,670 is a division of application No. 17/347,871, filed on Jun. 15, 2021, granted, now 11,978,720.
Claims priority of provisional application 63/142,563, filed on Jan. 28, 2021.
Prior Publication US 2024/0258266 A1, Aug. 1, 2024
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/81 (2013.01) [H01L 24/16 (2013.01); H01L 2224/16058 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81024 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81203 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package comprising:
a first die;
a first substrate bonded to the first die using a plurality of first conductive connectors, wherein each of the plurality of first conductive connectors comprises a first conductive pillar adhered to a first solder bump, wherein each of the plurality of first conductive connectors comprises an hourglass shape, wherein a lower portion of the first solder bump extends through a solder resist layer, and wherein the first solder bump decreases continuously in width in a direction toward a mid-point between a bottommost surface of the first conductive pillar and a topmost surface of the solder resist layer, wherein the first solder bump comprises a single homogeneous material, and wherein a middle portion of the first solder bump at the mid-point between the bottommost surface of the first conductive pillar and the topmost surface of the solder resist layer is free of vertical sidewalls; and
a second substrate bonded to the first substrate using a plurality of second conductive connectors.