US 12,444,705 B2
Memory devices and related electronic systems
Fatma Arzum Simsek-Ege, Boise, ID (US); and Yuan He, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jan. 31, 2024, as Appl. No. 18/429,311.
Application 18/429,311 is a continuation of application No. 17/562,453, filed on Dec. 27, 2021, granted, now 11,916,032.
Prior Publication US 2024/0170427 A1, May 23, 2024
Int. Cl. H01L 25/065 (2023.01); G11C 11/408 (2006.01); G11C 11/4091 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2023.01); H10B 12/00 (2023.01)
CPC H01L 24/08 (2013.01) [G11C 11/4085 (2013.01); G11C 11/4091 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H10B 12/30 (2023.02); H10B 12/50 (2023.02); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1436 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a first structure comprising:
volatile memory cells horizontally overlapping and vertically stacked relative to one another, the volatile memory cells respectively comprising:
a storage device; and
an access device horizontally neighboring and coupled to the storage device;
a local digit line vertically extending through and coupled to the volatile memory cells;
a multiplexer vertically underlying and coupled to the local digit line; and
a global digit line vertically underlying the volatile memory cells and coupled to the multiplexer; and
a second structure vertically overlying and bonded to the first structure, the second structure comprising additional control logic circuitry coupled to the volatile memory cells of the first structure.