| CPC H01L 23/60 (2013.01) [H01L 25/0753 (2013.01); H01L 25/167 (2013.01); H10H 20/018 (2025.01); H10H 20/857 (2025.01)] | 6 Claims |

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1. Method of protecting optoelectronic devices against electrostatic discharges, each optoelectronic device comprising an electronic circuit comprising at least one electronic component and an optoelectronic circuit bonded to the electronic circuit and comprising at least one optoelectronic component from among a light-emitting diode or a photodiode, the method comprising the forming of first and second wafers, the first wafer comprising a plurality of copies of the electronic circuit and the second wafer comprising a plurality of copies of the optoelectronic circuit, the bonding of one of the first or second wafers to a support, the bonding of the other one of the first or second wafers to the one of the first or second wafers, and the separation of the electronic devices from one another, wherein the first wafer and the second wafer comprises at least one system for protecting optoelectronic devices against electrostatic discharges, the protection system no longer being functional after the step of separation of the electronic devices from one another, wherein the first wafer comprises an electrostatic discharge protection circuit, wherein the protection circuit is electrically coupled by conductive tracks to the electronic components of the plurality of electronic circuits and to the optoelectronic components of the plurality of optoelectronic circuits, the step of separation of the electronic devices causing the interruption of the conductive tracks between the protection circuit and the electric components and between the protection circuit and the optoelectronic components, wherein the step of separation of the optoelectronic devices comprises a step of cutting of the first and second wafers along cutting lines and wherein the conductive tracks are at least partly located on the cutting lines, wherein the portions of the conductive tracks which are removed at the cutting step are located in the second wafer.
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