| CPC H01L 23/5283 (2013.01) [G06F 30/398 (2020.01); H01L 23/5226 (2013.01); G03F 1/36 (2013.01); G06F 2119/12 (2020.01); H01L 23/53209 (2013.01)] | 20 Claims |
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1. A semiconductor device comprising:
first and second active regions extending in parallel in a substrate;
a plurality of conductive patterns, each conductive pattern of the plurality of conductive patterns extending continuously on the substrate across each of the first and second active regions;
a plurality of metal lines, each metal line of the plurality of metal lines overlying and extending continuously across each of the first and second active regions,
wherein each conductive pattern of the plurality of conductive patterns is electrically connected in parallel with each metal line of the plurality of metal lines from the first active region to the second active region;
a first middle metal line overlying and electrically connected to the first active region and each conductive pattern of the plurality of conductive patterns; and
a second middle metal line overlying and electrically connected to the second active region and each conductive pattern of the plurality of conductive patterns,
wherein each metal line of the plurality of metal lines overlies and is electrically connected to each of the first and second middle metal lines.
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