| CPC H01L 23/5283 (2013.01) [H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H10B 10/125 (2023.02)] | 20 Claims |

|
1. A semiconductor device comprising:
a substrate including a first surface and a second surface opposite to the first surface;
a first conductive line structure and a second conductive line structure disposed on the first surface of the substrate, extending in a first direction, and spaced apart from each other in a second direction;
a third conductive line structure disposed on the first surface of the substrate and between the first conductive line structure and the second conductive line structure, and extending in the first direction; and
a SRAM unit cell disposed on the first surface of the substrate,
wherein the SRAM unit cell includes:
a first inverter and a second inverter connected to each other in a cross-coupled manner;
a first pass transistor connected to the first inverter;
a second pass transistor connected to the second inverter;
a first gate electrode included in the first inverter; and
a second gate electrode included in the first pass transistor,
wherein the first inverter and the first pass transistor are disposed between the first conductive line structure and the third conductive line structure,
wherein the second inverter and the second pass transistor are disposed between the second conductive line structure and the third conductive line structure, and
wherein the first gate electrode and the second gate electrode are disposed between the first conductive line structure and the third conductive line structure.
|