US 12,444,663 B2
Semiconductor package including a semiconductor die disposed in a cavity and method for manufacturing thereof
Meng-Liang Lin, Hsinchu (TW); Po-Yao Chuang, Hsin-Chu (TW); Te-Chi Wong, Hsinchu (TW); Shuo-Mao Chen, New Taipei (TW); and Shin-Puu Jeng, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 16, 2024, as Appl. No. 18/443,338.
Application 18/443,338 is a continuation of application No. 17/462,000, filed on Aug. 31, 2021, granted, now 11,908,764.
Prior Publication US 2024/0194556 A1, Jun. 13, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/3192 (2013.01) [H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 23/481 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 24/96 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/181 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a circuit substrate having a cavity concave into a first surface of the circuit substrate with a depth, wherein the circuit substrate includes a dielectric material, metallic patterns embedded in the dielectric material, and a metal floor plate below the cavity and fully wrapped by the dielectric material, wherein a span of the metal floor plate and a vertical projection of the cavity are overlapped, and the metal floor plate is electrically isolated from the metallic patterns and is electrically floating;
conductive balls disposed on a second surface of the circuit substrate opposite to the first surface;
a filling material disposed on the first surface of the circuit substrate and filled in the cavity of the circuit substrate; and
a semiconductor die, disposed in the cavity and wrapped by the filling material, wherein the semiconductor die is electrically connected with the metallic patterns of the circuit substrate.