| CPC H01L 23/3185 (2013.01) [H01L 23/564 (2013.01); H01L 25/0655 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 23/147 (2013.01); H01L 23/3675 (2013.01); H01L 23/49827 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/73204 (2013.01)] | 20 Claims |

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1. A semiconductor package comprising:
a first substrate;
a second substrate mounted on the first substrate through solder bumps;
a plurality of semiconductor devices on the second substrate and spaced apart from each other, the semiconductor devices being electrically connected to the second substrate;
a first underfill member between the semiconductor devices and the second substrate;
a stress relief structure on the second substrate, wherein the stress relief structure includes an elastic member that surrounds the semiconductor devices and covers the first underfill member; and
thermal interface materials disposed on upper surfaces of the semiconductor devices; and
a heat slug on the thermal interface materials,
wherein the stress relief structure has increased elasticity relative to the first underfill member, and
wherein the first underfill member exposes side surfaces of the semiconductor devices facing each other and the elastic member is in contact with the side surfaces of the semiconductor devices exposed by the first underfill member.
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