US 12,444,653 B2
Buried power rail at tight cell-to-cell space
Ruilong Xie, Niskayuna, NY (US); Stuart Sieg, Albany, NY (US); Somnath Ghosh, Clifton Park, NY (US); Kisik Choi, Watervliet, NY (US); and Kevin Shawn Petrarca, Newburgh, NY (US)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Dec. 8, 2021, as Appl. No. 17/545,073.
Prior Publication US 2023/0178433 A1, Jun. 8, 2023
Int. Cl. H01L 21/768 (2006.01); H01L 21/74 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01); H01L 23/535 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01)
CPC H01L 21/76898 (2013.01) [H01L 23/481 (2013.01); H10D 84/83 (2025.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first buried power rail (BPR) disposed through an etch stop layer;
a second BPR disposed in direct contact with the first BPR, wherein the second BPR has a larger critical dimension (CD) than the first BPR; and
dielectric sidewall spacer disposed between the first BPR and the etch stop layer.