| CPC H01L 21/31116 (2013.01) [H10D 30/014 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 64/017 (2025.01); H10D 84/0167 (2025.01); H10D 84/038 (2025.01); H10D 30/6757 (2025.01); H10D 84/85 (2025.01)] | 20 Claims |

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1. A method of fabricating a field effect transistor (FET) over a substrate, the method comprising:
growing a doped p-type semiconductor from a silicon nanosheet of the substrate, the substrate comprising a layer stack of alternating layers of the silicon nanosheet and a sacrificial layer, and a dummy gate formed over the layer stack, the layer stack comprising a trench exposing sidewalls of the layer stack, the doped p-type semiconductor and the sacrificial layer being separated by a dielectric inner spacer;
removing the dummy gate; and
etching the sacrificial layer selectively to the doped p-type semiconductor, the etching comprising exposing the substrate to a process gas comprising a fluorocarbon and a fluorine-containing etch gas in the absence of plasma.
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