US 12,444,609 B2
Silicon-on-insulator die support structures and related methods
Michael J. Seddon, Gilbert, AZ (US); Francis J. Carney, Mesa, AZ (US); Eiji Kurose, Oizumi-machi (JP); Chee Hiong Chew, Seremban (MY); and Soon Wei Wang, Seremban (MY)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Jun. 9, 2022, as Appl. No. 17/806,144.
Application 17/806,144 is a division of application No. 16/861,810, filed on Apr. 29, 2020, granted, now 11,361,970.
Application 16/702,958 is a division of application No. 15/679,661, filed on Aug. 17, 2017, granted, now 10,529,576, issued on Jan. 7, 2020.
Application 16/861,810 is a continuation in part of application No. 16/702,958, filed on Dec. 4, 2019, granted, now 11,328,930, issued on May 10, 2022.
Application 16/861,810 is a continuation in part of application No. 16/395,822, filed on Apr. 26, 2019, granted, now 10,763,173, issued on Sep. 1, 2020.
Application 16/861,810 is a continuation in part of application No. 15/961,642, filed on Apr. 24, 2018, granted, now 10,741,487, issued on Aug. 11, 2020.
Application 16/395,822 is a continuation of application No. 15/679,664, filed on Aug. 17, 2017, granted, now 10,319,639, issued on Jun. 11, 2019.
Prior Publication US 2022/0301876 A1, Sep. 22, 2022
Int. Cl. H01L 23/00 (2006.01); H01L 21/302 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 23/12 (2006.01); H01L 23/31 (2006.01)
CPC H01L 21/302 (2013.01) [H01L 21/48 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/12 (2013.01); H01L 23/3185 (2013.01); H01L 24/04 (2013.01); H01L 24/26 (2013.01); H01L 2224/94 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A silicon-in-insulator (SOI) semiconductor die comprising:
a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and
a permanent die support structure and a temporary die support structure directly coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof;
wherein the first largest planar surface, the second largest planar surface, and the thickness are formed of a conductive layer directly coupled onto a silicon layer and an insulative layer coupled over the conductive layer.