US 12,444,471 B2
Memory device for performing erase verify operation on cell string group basis and method of operating the same
Jun Young Kweon, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Sep. 7, 2023, as Appl. No. 18/462,433.
Claims priority of application No. 10-2023-0033192 (KR), filed on Mar. 14, 2023.
Prior Publication US 2024/0312539 A1, Sep. 19, 2024
Int. Cl. G11C 16/04 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/3445 (2013.01) [G11C 16/0483 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a plurality of memory blocks each including a plurality of cell string groups;
a peripheral circuit configured to perform an erase verify operation on a memory block selected from among the plurality of memory blocks; and
an erase operation controller configured to control the peripheral circuit to perform the erase verify operation in units of cell string groups within the selected memory block,
wherein the erase operation controller controls the peripheral circuit to apply, during the erase verify operation, different erase verify voltages to the selected memory block whenever the erase verify operation is performed on each of the cell string groups.