US 12,444,456 B2
Memristor-based in-memory logic circuit and in-memory logic computation system, and applications
Chao Wang, Hubei (CN); Yuansheng Zhao, Hubei (CN); Jiarui Xu, Hubei (CN); and Zongwei Wang, Beijing (CN)
Assigned to HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY, Hubei (CN); and PEKING UNIVERSITY, Beijing (CN)
Filed by HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY, Hubei (CN); and Peking University, Beijing (CN)
Filed on Jun. 29, 2023, as Appl. No. 18/343,876.
Claims priority of application No. 202310131821.8 (CN), filed on Feb. 17, 2023.
Prior Publication US 2024/0282360 A1, Aug. 22, 2024
Int. Cl. G11C 11/4091 (2006.01); G11C 11/408 (2006.01); G11C 11/4096 (2006.01)
CPC G11C 11/4091 (2013.01) [G11C 11/4087 (2013.01); G11C 11/4096 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A memristor-based in-memory logic circuit, comprising: a first memory cell and a second memory cell connected in parallel to each other, and a sense amplifier,
the first memory cell comprising a first memristor and a first MOSFET selector connected in series, the second memory cell comprising a second memristor and a second MOSFET selector connected in series,
respective terminals of the first memristor and the second memristor being grounded, parallel-connection terminals of the first MOSFET selector and the second MOSFET selector being connected to a first input terminal of the sense amplifier, a second input terminal of the sense amplifier being connected to a reference signal, positive-phase and negative-phase output voltage signals of the sense amplifier being a logic operation result,
resistance states of the first memristor and the second memristor representing a first group of logic input signals, and voltage signals applied by gates of the first MOSFET selector and the second MOSFET selector representing a second group of logic input signals,
wherein a first input signal A is used to represent the resistance state Dini(A) of the first memristor, and an inversion signal Ā of the first input signal A is used as the resistance state Din1′(Ā) of the second memristor,
a second input signal B being used to represent the voltage signal Din2′(B) applied by the gate of the second MOSFET selector, an inversion signal B of the second input signal B being used as the voltage signal Din2(B) applied by the gate of the first MOSFET selector, and
the sense amplifier generating “XOR” and “XNOR” logic operation results.