US 12,444,450 B2
Memory device and method for managing dynamic voltage frequency scaling operations based on host configuration
Chul-Hwan Choo, Hwaseong-si (KR); Jun Ha Hwang, Seoul (KR); and Doo Hee Hwang, Seongnam-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jul. 25, 2022, as Appl. No. 17/814,640.
Claims priority of application No. 10-2021-0157904 (KR), filed on Nov. 16, 2021; and application No. 10-2022-0007242 (KR), filed on Jan. 18, 2022.
Prior Publication US 2023/0154509 A1, May 18, 2023
Int. Cl. G11C 5/14 (2006.01); G06F 1/3234 (2019.01); G06F 1/3296 (2019.01); G11C 7/10 (2006.01); G11C 7/22 (2006.01)
CPC G11C 7/222 (2013.01) [G06F 1/3275 (2013.01); G06F 1/3296 (2013.01); G11C 5/14 (2013.01); G11C 7/1048 (2013.01); G11C 7/109 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
a memory cell array for storing data;
a mode register;
a table associated with operation modes of the memory device and operating voltages of the memory device corresponding to the operation modes respectively; and
a control logic circuit configured to receive a command from a host device,
wherein the memory device is configured to receive a mode register write command including information indicating at least one of the operation modes from the host device to set the mode register with the information in the memory device,
write the determined level of the operating voltage into the mode register according to the mode register write command received from the host device,
write the determined level of the operating voltage in the mode register according to the mode register write command received from the host device,
receive a mode register read command from the host device, and
transmit the determined level of the operating voltage to the host device according to the mode register read command received from the host device.