| CPC G09G 3/3648 (2013.01) [G09G 5/18 (2013.01); G09G 2300/0452 (2013.01); G09G 2310/08 (2013.01)] | 7 Claims |
|
1. A source driver supplied with a plurality of serial data signals together with a first clock signal from outside, the serial data signal indicating image data and a frame control signal regarding vertical synchronization timing and horizontal synchronization timing of the image data, the serial data signal including setting data for image data control and timing control in a predetermined section of the image data, the first clock signal indicating synchronization timing of the plurality of serial data signals, the source driver comprising:
an image data and clock receiver that sequentially receives the plurality of serial data signals and the first clock signal, obtains the image data and the frame control signal from the received plurality of serial data signals, and outputs the obtained image data and frame control signal and a second clock signal based on the first clock signal;
a switch signal generator that generates a switch signal in the predetermined section among the image data being output from the image data and clock receiver based on the frame control signal output from the image data and clock receiver;
a selector that outputs the second clock signal as a write enable signal and outputs a part of the image data as the setting data according to the switch signal;
a register that stores the setting data according to the write enable signal;
a source timing signal generator that generates a source timing signal based on the frame control signal and the second clock signal output from the image data and clock receiver and the setting data stored in the register;
a display data generator that generates display data for a plurality of data lines of a display panel based on the image data and the second clock signal output from the image data and clock receiver and the setting data stored in the register; and
a drive signal generator that generates drive signals having gradation voltages for the plurality of data lines, respectively corresponding to the display data in synchronization with the source timing signal, and outputs the drive signals to the plurality of data lines of the display panel.
|