US 12,444,364 B2
Initial signal generator, display panel and display method thereof, and display apparatus
Jiaxiang Zhang, Beijing (CN); Liangliang Ju, Beijing (CN); Zan Luo, Beijing (CN); Yonglin Chen, Beijing (CN); Gong Chen, Beijing (CN); Yuan Fang, Beijing (CN); Mingqiang Wang, Beijing (CN); Chang Wang, Beijing (CN); Seungyong Oh, Beijing (CN); Bin Zhang, Beijing (CN); and Xin Mu, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 18/689,080
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Aug. 31, 2022, PCT No. PCT/CN2022/116290
§ 371(c)(1), (2) Date Mar. 5, 2024,
PCT Pub. No. WO2024/045067, PCT Pub. Date Mar. 7, 2024.
Prior Publication US 2025/0131880 A1, Apr. 24, 2025
Int. Cl. G09G 3/3233 (2016.01); G09G 3/20 (2006.01)
CPC G09G 3/3233 (2013.01) [G09G 3/2074 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2340/0435 (2013.01); G09G 2360/16 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A display panel, comprising a plurality of pixel units arranged in an array, at least one pixel unit comprising a plurality of sub-pixels, at least one sub-pixel comprising a pixel drive circuit and a light emitting element electrically connected with the pixel drive circuit, the display panel further comprising an initial signal generator, a driving mode of the display panel comprising a low frequency driving mode and a normal driving mode, and the low frequency driving mode comprising a refresh frame stage configured to write data to the pixel unit and a hold frame stage configured to hold the data written to the pixel unit, wherein:
the initial signal generator comprises a processor and a memory, wherein the processor and the memory are connected, the memory is configured to store instructions and the processor is configured to execute the instructions stored in the memory, and the initial signal generator is configured to acquire a current display brightness value (DBV) band and a pattern to be displayed under the low frequency driving mode; quantize the pattern to be displayed to get an average picture level, wherein the average picture level is positively correlated with a brightness of a pixel unit by which the pattern to be displayed is started and negatively correlated with a brightness of the display panel when displaying an all-white pattern; determine a corresponding anode reset voltage according to the current DBV band and the average picture level; and in the hold frame stage, output the corresponding anode reset voltage to the pixel drive circuit to reset an anode of the light emitting element.